Existing UEFI setting restrictions for DCI (Direct Connect Interface) in 5th and 6th generation Intel Xeon Processor E3 Family, Intel Xeon Scalable processors, and Intel Xeon Processor D Family allows a limited physical presence attacker to potentially access platform secrets via debug interfaces.
The product exposes sensitive information to an actor that is not explicitly authorized to have access to that information.
| Name | Vendor | Start Version | End Version |
|---|---|---|---|
| Xeon_e3 | Intel | 1505m_v6 (including) | 1505m_v6 (including) |
| Xeon_e3 | Intel | 1515m_v5 (including) | 1515m_v5 (including) |
| Xeon_e3 | Intel | 1535m_v5 (including) | 1535m_v5 (including) |
| Xeon_e3 | Intel | 1535m_v6 (including) | 1535m_v6 (including) |
| Xeon_e3 | Intel | 1545m_v5 (including) | 1545m_v5 (including) |
| Xeon_e3 | Intel | 1558l_v5 (including) | 1558l_v5 (including) |
| Xeon_e3 | Intel | 1565l_v5 (including) | 1565l_v5 (including) |
| Xeon_e3 | Intel | 1575m_v5 (including) | 1575m_v5 (including) |
| Xeon_e3 | Intel | 1578l_v5 (including) | 1578l_v5 (including) |
| Xeon_e3 | Intel | 1585_v5 (including) | 1585_v5 (including) |
| Xeon_e3 | Intel | 1585l_v5 (including) | 1585l_v5 (including) |
| Xeon_e3_1220_v5 | Intel | - (including) | - (including) |
| Xeon_e3_1220_v6 | Intel | - (including) | - (including) |
| Xeon_e3_1225_v5 | Intel | - (including) | - (including) |
| Xeon_e3_1225_v6 | Intel | - (including) | - (including) |
| Xeon_e3_1230_v5 | Intel | - (including) | - (including) |
| Xeon_e3_1230_v6 | Intel | - (including) | - (including) |
| Xeon_e3_1235l_v5 | Intel | - (including) | - (including) |
| Xeon_e3_1240_v5 | Intel | - (including) | - (including) |
| Xeon_e3_1240_v6 | Intel | - (including) | - (including) |
| Xeon_e3_1240l_v5 | Intel | - (including) | - (including) |
| Xeon_e3_1245_v5 | Intel | - (including) | - (including) |
| Xeon_e3_1245_v6 | Intel | - (including) | - (including) |
| Xeon_e3_1260l_v5 | Intel | - (including) | - (including) |
| Xeon_e3_1268l_v5 | Intel | - (including) | - (including) |
| Xeon_e3_1270_v5 | Intel | - (including) | - (including) |
| Xeon_e3_1270_v6 | Intel | - (including) | - (including) |
| Xeon_e3_1275_v5 | Intel | - (including) | - (including) |
| Xeon_e3_1275_v6 | Intel | - (including) | - (including) |
| Xeon_e3_1280_v5 | Intel | - (including) | - (including) |
| Xeon_e3_1280_v6 | Intel | - (including) | - (including) |
| Xeon_e3_1285_v6 | Intel | - (including) | - (including) |
| Xeon_e3_1501l_v6 | Intel | - (including) | - (including) |
| Xeon_e3_1501m_v6 | Intel | - (including) | - (including) |
| Xeon_e3_1505l_v5 | Intel | - (including) | - (including) |
| Xeon_e3_1505l_v6 | Intel | - (including) | - (including) |
| Xeon_e3_1505m_v5 | Intel | - (including) | - (including) |
There are many different kinds of mistakes that introduce information exposures. The severity of the error can range widely, depending on the context in which the product operates, the type of sensitive information that is revealed, and the benefits it may provide to an attacker. Some kinds of sensitive information include:
Information might be sensitive to different parties, each of which may have their own expectations for whether the information should be protected. These parties include:
Information exposures can occur in different ways:
It is common practice to describe any loss of confidentiality as an “information exposure,” but this can lead to overuse of CWE-200 in CWE mapping. From the CWE perspective, loss of confidentiality is a technical impact that can arise from dozens of different weaknesses, such as insecure file permissions or out-of-bounds read. CWE-200 and its lower-level descendants are intended to cover the mistakes that occur in behaviors that explicitly manage, store, transfer, or cleanse sensitive information.