A signal handler race condition exists in the Layer 2 Address Learning Daemon (L2ALD) of Juniper Networks Junos OS due to the absence of a specific protection mechanism to avoid a race condition which may allow an attacker to bypass the storm-control feature on devices. This issue is a corner case and only occurs during specific actions taken by an administrator of a device under certain specifics actions which triggers the event. The event occurs less frequently on devices which are not configured with Virtual Chassis configurations, and more frequently on devices configured in Virtual Chassis configurations. This issue is not specific to any particular Junos OS platform. An Indicator of Compromise (IoC) may be seen by reviewing log files for the following error message seen by executing the following show statement: show log messages | grep storm Result to look for: /kernel: GENCFG: op 58 (Storm Control Blob) failed; err 1 (Unknown) This issue affects: Juniper Networks Junos OS: 14.1X53 versions prior to 14.1X53-D49 on EX Series; 15.1 versions prior to 15.1R7-S6; 15.1X49 versions prior to 15.1X49-D191, 15.1X49-D200 on SRX Series; 16.1 versions prior to 16.1R7-S7; 16.2 versions prior to 16.2R2-S11, 16.2R3; 17.1 versions prior to 17.1R2-S11, 17.1R3; 17.2 versions prior to 17.2R2-S8, 17.2R3-S3; 17.3 versions prior to 17.3R2-S5, 17.3R3-S7; 17.4 versions prior to 17.4R2-S9, 17.4R3; 18.1 versions prior to 18.1R3-S5; 18.2 versions prior to 18.2R2-S6, 18.2R3; 18.3 versions prior to 18.3R1-S7, 18.3R2-S3, 18.3R3; 18.4 versions prior to 18.4R1-S5, 18.4R2; 19.1 versions prior to 19.1R1-S4, 19.1R2.
The product contains a code sequence that can run concurrently with other code, and the code sequence requires temporary, exclusive access to a shared resource, but a timing window exists in which the shared resource can be modified by another code sequence that is operating concurrently.
| Name | Vendor | Start Version | End Version |
|---|---|---|---|
| Junos | Juniper | 14.1x53 (including) | 14.1x53 (including) |
| Junos | Juniper | 14.1x53-d10 (including) | 14.1x53-d10 (including) |
| Junos | Juniper | 14.1x53-d15 (including) | 14.1x53-d15 (including) |
| Junos | Juniper | 14.1x53-d16 (including) | 14.1x53-d16 (including) |
| Junos | Juniper | 14.1x53-d20 (including) | 14.1x53-d20 (including) |
| Junos | Juniper | 14.1x53-d25 (including) | 14.1x53-d25 (including) |
| Junos | Juniper | 14.1x53-d26 (including) | 14.1x53-d26 (including) |
| Junos | Juniper | 14.1x53-d27 (including) | 14.1x53-d27 (including) |
| Junos | Juniper | 14.1x53-d30 (including) | 14.1x53-d30 (including) |
| Junos | Juniper | 14.1x53-d34 (including) | 14.1x53-d34 (including) |
| Junos | Juniper | 14.1x53-d35 (including) | 14.1x53-d35 (including) |
| Junos | Juniper | 14.1x53-d38 (including) | 14.1x53-d38 (including) |
| Junos | Juniper | 14.1x53-d40 (including) | 14.1x53-d40 (including) |
| Junos | Juniper | 14.1x53-d42 (including) | 14.1x53-d42 (including) |
| Junos | Juniper | 14.1x53-d43 (including) | 14.1x53-d43 (including) |
| Junos | Juniper | 14.1x53-d44 (including) | 14.1x53-d44 (including) |
| Junos | Juniper | 14.1x53-d45 (including) | 14.1x53-d45 (including) |
| Junos | Juniper | 14.1x53-d46 (including) | 14.1x53-d46 (including) |
| Junos | Juniper | 14.1x53-d47 (including) | 14.1x53-d47 (including) |
| Junos | Juniper | 14.1x53-d48 (including) | 14.1x53-d48 (including) |
This can have security implications when the expected synchronization is in security-critical code, such as recording whether a user is authenticated or modifying important state information that should not be influenced by an outsider. A race condition occurs within concurrent environments, and is effectively a property of a code sequence. Depending on the context, a code sequence may be in the form of a function call, a small number of instructions, a series of program invocations, etc. A race condition violates these properties, which are closely related:
A race condition exists when an “interfering code sequence” can still access the shared resource, violating exclusivity. Programmers may assume that certain code sequences execute too quickly to be affected by an interfering code sequence; when they are not, this violates atomicity. For example, the single “x++” statement may appear atomic at the code layer, but it is actually non-atomic at the instruction layer, since it involves a read (the original value of x), followed by a computation (x+1), followed by a write (save the result to x). The interfering code sequence could be “trusted” or “untrusted.” A trusted interfering code sequence occurs within the product; it cannot be modified by the attacker, and it can only be invoked indirectly. An untrusted interfering code sequence can be authored directly by the attacker, and typically it is external to the vulnerable product.